High-speed integrated circuits and semiconductor devices are known to suffer from parasitic inductances that occur, for example, in individual components and around interconnection lines. Inductance is defined generally as the ratio of magnetic flux to electric current. It is well known that when an electrical signal is passed through a conductor, for example, when a variable or periodically alternating current is passed through a wire, a magnetic field is produced around the conductor. The magnetic field varies with respect to time in the same manner as the current through that conductor. This time-varying magnetic field is capable of adversely affecting the voltage stability in that component through self-inductance, or in other nearby components through mutual inductance. Though mutual inductance effects can be obviated, for example, by shielding of some kind, elimination of self-inductance, in particular parasitic self-inductance, remains a challenge. Hereinafter, unless otherwise noted, all mentions of inductance phenomena shall refer to self-inductance, not mutual inductance.
Parasitic inductance refers to a phenomenon, whereby the magnetic fields generated by component conductors induce undesirable electronic effects. The occurrence of parasitic inductance acts as a serious performance-limiting factor to integrated circuits and semiconductor devices. For example, parasitic inductance can degrade signal quality, cause circuit noise and signal ringing, induce voltage drops (Ldi/dt) in the components, and result in loss of data.
Parasitic inductances affect the high-speed performance of circuits by influencing the impedance of components in the circuit. If the impedance of a component were to be viewed as a standing wave with a period fixed by the period of the alternating current, it would be apparent that a separate impedance wave could be constructed, 180° out-of-phase with the wave generated by the parasitic inductance, that effectively would cancel out the parasitic inductance. A fitting nomenclature for a device capable of producing such a wave, therefore, is a “negative inductor.” Because they produce a negative self-inductance, the negative inductors can be used to effectively reduce or eliminate parasitic inductances, for example, in the data paths of large-scale integrated circuits. Elimination of the parasitic inductances is desirable, for example, for ensuring signal integrity in the circuits.
In macro-scale electronic devices and circuits, techniques have long been available for generating negative self-inductance “effects” by employing various complex arrangements of active components. Such arrangements may comprise multiple components, including field effect transistors (FETs), or complex integrated circuits such as operational amplifiers (op-amps), all of which require a large amount of space on a microelectronic chip. However, the necessarily high total number of components in such a negative self-inductance circuit is undesirable in the production of increasingly smaller microelectronic devices and circuits.
Therefore, there remains a need for single, passive components that produce negative self-inductance during their operation. Single-component negative inductors advantageously can reduce costs, eliminate device complexity, and save space on a microelectronic chip. Accordingly, there remains also a need for a method to fabricate components that have negative self-inductance during operation.